Calling all Engineers! Registration Closing Soon for DesignCon - Global Trade Magazine
  January 17th, 2018 | Written by

Calling all Engineers! Registration Closing Soon for DesignCon

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  • Attendees can earn accreditation from the The Institute of Electrical and Electronics Engineers.
  • This year's event will feature four primary formats including panel discussions and training boot camps.
  • Google and Cisco are some of the leading companies that will share key insights and industry knowledge during the event.

The 24th Annual DesignCon Conference, scheduled for January 29-31 at the Santa Clara Convention Center,  is closing its registration soon. The nation’s largest educational conference for chip, board and systems design engineers will feature over 100 sessions from the industry’s top 99 engineers and leaders who carefully review and approve each speaker submission.

“Every year DesignCon puts together an unmatched educational conference that is tailored specifically to the interests of our community of engineers,” said Suzanne Deffree, Brand Director, Intelligent Systems and Design, UBM. “We are excited to provide an event that speaks to the fundamental trends and future innovations across electrical engineering, and features presentations from some of the brightest minds in the industry.”

Additionally, attendees are given the opportunity to earn accreditation from the The Institute of Electrical and Electronics Engineers (IEEE) and receiving an official IEEE certificate based on the hours invested during the conference.

This year’s event will feature four primary formats inclusive of:

Three all-day training boot camps for hardware design engineers with topics covering  the art of signal integrity analysis, machine learning, and artificial intelligence for hardware and electronics design.

Panel discussions analyzing 112 Gbps package challenges, PCI Express ecosystem planning for 32 GT/s, and optimizing 400-GbE signal intergrity.

Three-hour tutorial sessions focusing on design and verification for high-speed I/Os and lowering the barrier to entry for electronic and photonic ICs.

Over 80 Technical Sessions with feature presentations and research on issues such as Using Multiple Huygens Boxes to Detect & Quantify the Coupling Path from Noise Source to Victim.

Amazon Lab 126, AMD, ANSYS, Broadcom, Cadence, Cisco, Google, Huawei, IBM, Intel, Keysight Technologies, Mentor, Molex, Raytheon, Samsung, Samtec, Siemens, Synopsys, TE Connectivity, Tektronix, and Xilinx are some of the leading companies that will share key insights and industry knowledge during the event.

Don’t miss the industry event of the year, register HERE.

Source: Globe Newswire